The present invention relates to a multiplexer-demultiplexer combination at one communication terminal and more particularly to an asynchronous digital time division multiplex (TDM) multiplexer-demultiplexer combination.
An asynchronous multiplexer and demultiplexer combination and its associated hard wired common controller is disclosed in U.S. Pat. No. 3,982,077 of J. M. Clark, S. B. Cohen and A. H. Magnus, issued Sept. 21, 1976, assigned to the same assignee as the instant application.
The asynchronous digital TDM multiplexer-demultiplexer combination located at one communication terminal of this patent will multiplex N asynchronous source data signals having a first mixture of different bit rates into a transmitted synchronous data stream having a predetermined fixed data format and a given bit rate greater than the total of the bit rates of the source data and to demultiplex N asynchronous source data signals having a second mixture of different bit rates from a received synchronous data stream having the predetermined fixed data format and the given bit rate, where N is an integer greater than one. This combination includes an automatic channel assignment circuit to assign channels of the two data streams to the asynchronous source data signals in a manner to minimize temporary data memory regardless of the number of different bit rates by assigning the data signals to channels of the associated one of the two data streams so that the bits of each of the data signals tend to have equal spacing throughout the bits of the associated one of the two data streams. The channel assignment control circuit also includes a means to automatically indicate when the total of the mixture of the bit rates has exceeded an allowable maximum.
The asynchronous multiplexer-demultiplexer combination of the above-cited patent employed 24 channel capability for NRZ (non-return to zero) or conditioned diphase digital signals and a hard wired common controller to provide the common control functions for a multiplexer-demultiplexer combination. The common control functions include the multiplexing and demultiplexing time slot assignments, overhead channel format generation, receive frame synchronization, stuff-destuff control, automatic channel assignment and BITE (built-in test equipment). The hard wire circuitry of the above-cited U.S. patent provided automatic channel assignment which simplifies the human interface with the equipment, optimal frame format and overhead channel assignment which minimizes format jitter, provides excellent framing performance compatible with the automatic channel assignment concept and employed the custom large scale integrated (LSI) circuits which provided most of the logic functions of the multi-user digital cards.